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A Survey of Lightweight-Cryptography Implementations
Author: T. Eisenbarth, S. Kumar, L. Uhsadel, C. Paar, A. Poschmann
Description:
The tight cost and implementation constraints of high-volume products, including secure RFID tags and smart cards, require specialized cryptographic implementations. The authors review recent developments in this area for symmetric and asymmetric ciphers, targeting embedded hardware and software. In this article, we present a selection of recently published lightweight-cryptography implementations and compare them to state-of-the-art results in their field.
Related Tags: ASIC, lightweight, crypto
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Performance Analysis of Contemporary Light-Weight Block Ciphers on 8-bit Microcontrollers
Author: S. Rinne, T. Eisenbarth, C. Paar
Description:
This work presents a performance analysis of software implementations of ciphers that are specially designed for the domain of ubiquitous computing. The analysis focuses on the special properties of embedded devices that need to be taken into account like cost (given by memory consumption) and energy requirements. The discussed ciphers include DESL, HIGHT, SEA, and TEA/XTEA. Assembler implementations of the ciphers for an 8-bit AVR microcontroller platform were analyzed and compared with a byte-oriented AES implementation. While all ciphers fail to outperform AES on the discussed 8-bit platform, TEA/XTEA and SEA at least consume significantly less memory than the AES.
Related Tags: VHDL, lightweight, Assembly, ASIC
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Sidechannel Resistant Lightweight ASIC Implementations of DES and AES
Author: A. Poschmann
Description:
In this thesis, we investigate a new lightweight cipher based on DESX. We investigate the design criteria of DES presented in [Cop94] and derive stronger design criteria. We show that S-boxes, which satisfy our new design criteria are more resistant against both differential and linear cryptanalysis. Our new cipher DLX is similar to DES or DESX, respectively, except for the f-function. DES uses eight different S-boxes, whereas our cipher only repeatedly uses one improved S-box (eight times). The implementation results show that our new cipher DLX requires less chip size, less energy, and is more secure against both differential and linear cryptanalysis. We also show that DLX requires 40% less chip size, 85% less clock cycles, and consumes only about 10% of the energy than the best AES implementation with regard to RFIDs needs [FDW04]. In this thesis we also investigate side channel attacks on AES. We present a size- optimised VHDL design of the AES and its results for a standard cell implementation. We show, that this ASIC can easily be broken with a simple power analysis (SPA).
Related Tags: S-box, ASIC, VHDL, lightweight, crypto, embedded
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Enabling Full-Size Public-Key Algorithms on 8-bit Sensor Nodes
Author: L. Uhsadel, A. Poschmann, C. Paar
Description:
In this article we present the fastest known implementation of a modular multiplication for a 160-bit standard compliant elliptic curve (secp160r1) for 8-bit micro controller which are typically used in WSNs. The major part (77%) of the processing time for an elliptic curve operation such as ECDSA or EC Diffie-Hellman is spent on modular multiplication. We present an optimized arithmetic algorithm which signicantly speed up ECC schemes. The reduced processing time also yields a signicantly lower energy consumption of ECC schemes. With our implementation results we can show that a 160-bit modular multiplication can be performed in 0.39 ms on an 8-bit AVR processor clocked at 7.37 MHz. This brings the vision of asymmetric cryptography in the eld of WSNs with all its benets for key-distribution and authentication a step closer to reality.
Related Tags: lightweight, Assembly, crypto, embedded
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A Family of Light-Weight Block Ciphers Based on DES Suited for RFID Applications
Author: A. Poschmann, G. Leander, K. Schramm, C. Paar
Description:
We propose a new block cipher, DESL (DES Lightweight extension), which is strong, compact and efficient. Due to its low chip size constraints DESL is especially suited for RFID (Radio Frequency Identification) devices. Our proposed DESL is based on the classical DES (Data Encryption Standard) design, however, unlike DES it uses a single Sbox repeated eight times. This approach makes it possible to considerably decrease chip size requirements. The S-box has been highly optimized in such a way that DESL resists common attacks, i.e. linear and differential cryptanalysis, and the Davies-Murphy-attack. Therefore DESL achieves a security level, which is appropriate for many applications. Furthermore, we propose a lightweight implementation of DESL, which requires 49% less chip size, 85% less clock cycles and 90% less energy than the best AES implementations with regard to RFID applications. Compared to the smallest DES implementation published until now, our DESL design requires 38% less transistors. As a results, our 0.18 pm DESL implementation requires a chip size of 7392 transistors (1848 gate equivalences) and is capable to encrypt a 64-bit plaintext in 144 clock cycles. When clocked at 100 kHz, it draws an average current of only 0.89 uA. These hardware figures are in the range of the best eSTREAM candidates, comprising DESL as a new alternative for stream ciphers. Keywords: RFID, DES, DESL, lightweight cryptography, S-box design criteria
Related Tags: S-box, lightweight
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New Lightweight Crypto Algorithms for RFID
Author: G. Leander, C. Paar, A. Poschmann, K. Schramm
Description:
The authors propose a new block cipher, DESL (DES lightweight extension), which is strong, compact and efficient. Due to its low area constraints DESL is especially suited for RFID (radiofrequency identification) devices. DESL is based on the classical DES (data encryption standard) design, however, unlike DES it uses a single S-box repeated eight times. This approach makes it possible to considerably decrease chip size requirements. The S-box has been highly optimized in such a way that DESL resists common attacks, i.e., linear and differential cryptanalysis, and the Davies-Murphy-attack. Therefore DESL achieves a security level which is appropriate for many applications. Furthermore, we propose a light-weight implementation of DESL which requires 45% less chip size and 86% less clock cycles than the best AES implementations with regard to RFID applications. Compared to the smallest DES implementation published, our DESL design requires 38% less transistors. Our 0.18mum DESL implementation requires a chip size of 7392 transistors (1848 gate equivalences) and is capable to encrypt a 64-bit plaintext in 144 clock cycles. When clocked at 100 kHz, it draws an average current of only 0.89muA. These hardware figures are in the range of the best eSTREAM streamcipher candidates, comprising DESL as a new alternative for ultra low-cost encryption.
Related Tags: S-box, ASIC, VHDL, lightweight, crypto
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Hardware Optimierte Lightweight Block-Chiffren für RFID- und Sensor-Systeme
Author: A. Poschmann, C. Paar
Description:
In diesem Artikel wird ein Überblick über leichtgewichtige Kryptographie (lightweight Cryptography) gegeben. Weiterhin werden die beiden neuen auf Hardware optimierten Chiffren DESL und PRESENT näher vorgestellt. Der anschließende Vergleich der Implementierungsergebnisse mit anderen kürzlich vorgeschlagenen Blockchiffren wie mCrypton, HIGHT oder CLEFIA zeigt, dass DESL und PRESENT weniger Chipfläche verbrauchen. Ebenfalls können beide Algorithmen überraschenderweise sogar mit kürzlich ver¨offentlichten, auf Hardware optimierten Stromchiffren (Trivium und Grain) konkurrieren.
Related Tags: lightweight, VHDL, ASIC
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PRESENT: An Ultra-Lightweight Block Cipher
Author: A. Bogdanov, L.R. Knudsen, G. Leander, C. Paar, A. Poschmann, M.J.B. Robshaw, Y. Seurin, and C. Vikkelsoe
Description:
With the establishment of the AES the need for new block ciphers has been greatly diminished; for almost all block cipher applications the AES is an excellent and preferred choice. However, despite recent implementation advances, the AES is not suitable for extremely constrained environments such as RFID tags and sensor networks. In this paper we describe an ultra-lightweight block cipher, present. Both security and hardware efficiency have been equally important during the design of the cipher and at 1570 GE, the hardware requirements for present are competitive with today’s leading compact stream ciphers.
Related Tags: lightweight
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New Lightweight Crypto Algorithms for RFID
Author: G. Leander, C. Paar, A. Poschmann, K. Schramm
Description:
The authors propose a new block cipher, DESL (DES lightweight extension), which is strong, compact and efficient. Due to its low area constraints DESL is especially suited for RFID (radiofrequency identification) devices. DESL is based on the classical DES (data encryption standard) design, however, unlike DES it uses a single S-box repeated eight times. This approach makes it possible to considerably decrease chip size requirements. The S-box has been highly optimized in such a way that DESL resists common attacks, i.e., linear and differential cryptanalysis, and the Davies-Murphy-attack. Therefore DESL achieves a security level which is appropriate for many applications. Furthermore, we propose a light-weight implementation of DESL which requires 45% less chip size and 86% less clock cycles than the best AES implementations with regard to RFID applications. Compared to the smallest DES implementation published, our DESL design requires 38% less transistors. Our 0.18mum DESL implementation requires a chip size of 7392 transistors (1848 gate equivalences) and is capable to encrypt a 64-bit plaintext in 144 clock cycles. When clocked at 100 kHz, it draws an average current of only 0.89muA. These hardware figures are in the range of the best eSTREAM streamcipher candidates, comprising DESL as a new alternative for ultra low-cost encryption
Related Tags: lightweight
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New Lightweight DES Variants
Author: G. Leander, C. Paar, A. Poschmann, K. Schramm
Description:
In this paper we propose a new block cipher, DESL (DES Lightweight), which is based on the classical DES (Data Encryption Standard) design, but unlike DES it uses a single S-box repeated eight times. On this account we adapt well-known DES S-box design criteria, such that they can be applied to the special case of a single S-box. Furthermore, we show that DESL is resistant against certain types of the most common attacks, i.e., linear and differential cryptanalyses, and the Davies-Murphy attack. Our hardware implementation results of DESL are very promising (1848 GE), therefore DESL is well suited for ultra-constrained devices such as RFID tags.
Related Tags: lightweight
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Comparison of Low-Power Public Key Cryptography on MICAz 8-Bit Micro Controller
Author: L. Uhsadel
Description:
The terms ubiquitous and pervasive computing designate the penetration of our ev- eryday life with intelligent devices. These tiny, constrained, and battery powered nodes are used to build WSNs that may process sensitive data. Therefore security as well as low energy consumption are crucial in this field. Since runtime scales with energy consumption efficient implementation is necessary at all costs. We will show by comparing of different implementations of asymmetric algorithms that ECC is a good choice in this case, as it allows shorter key length with adequate security level and furthermore can be efficiently implemented. We will provide mathematical background as well as algorithms for an efficient implementation. Subsequently we will present the fastest known implementation of a 160-bit multiplication, which is the core operation of the prime field of the standardized elliptic curve secp160r1. Even though the implementation is highly optimized for speed, the code-size of 5.4 KB and RAM requirements of 112 B are acceptable. The high efficient prime field is implemented in assembly and available on request. It is thought to be the base for high efficient curve implementations. A curve with basic optimizations is written in C and can also be reused. The 160-bit multiplication has a runtime of 0.39ms and requires with our C implementation of the curve 1.151s for a point multiplication. This could be optimized to approximately 0.76s for one point multiplication in combination with a highly efficient elliptic curve. Furthermore this would allow the execution of an ECDSA signature in less than one second without pre-calculation.
Related Tags: lightweight, crypto, embedded
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New Lightweight DES Variants
Author: G. Leander, C. Paar, A. Poschmann, K. Schramm
Description:
In this paper we propose a new block cipher, DESL (DES Lightweight), which is based on the classical DES (Data Encryption Standard) design, but unlike DES it uses a single S-box rep eated eight times. On this account we adapt well-known DES S-box design criteria, such that they can be applied to the special case of a single S-box. Furthermore, we show that DESL is resistant against certain types of the most common attacks, i.e., linear and differential cryptanalyses, and the Davies-Murphy attack. Our hardware implementation results of DESL are very promising (1848 GE), therefore DESL is well suited for ultra-constrained devices such as RFID tags.
Related Tags: S-box, lightweight, crypto
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Sunday, 23. July 2017 06:42:57 PM - www.lightweightcrypto.org