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A Survey of Lightweight-Cryptography Implementations
Author: T. Eisenbarth, S. Kumar, L. Uhsadel, C. Paar, A. Poschmann
Description:
The tight cost and implementation constraints of high-volume products, including secure RFID tags and smart cards, require specialized cryptographic implementations. The authors review recent developments in this area for symmetric and asymmetric ciphers, targeting embedded hardware and software. In this article, we present a selection of recently published lightweight-cryptography implementations and compare them to state-of-the-art results in their field.
Related Tags: ASIC, lightweight, crypto
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Comparison of Innovative Signature Algorithms for WSNs
Author: B. Driessen, A. Poschmann, C. Paar
Description:
For many foreseen applications of Wireless Sensor Networks (WSN) - for example monitoring the structural health of a bridge â?? message integrity is a crucial requirement. Usually, security services such as message integrity are realized by symmetric cryptography only, because asymmetric cryptography is often stated as impracticable for WSN. However, the proposed solutions for symmetric key establishment introduce a significant computation, storage, and most important-communication overhead. Digital signatures and key-exchange based on asymmetric algorithms would be very valuable though. In the literature nearly only RSA and ECC are implemented and compared for sensor nodes, though there exist a variety of innovative asymmetric algorithms. To close this gap, we investigated the efficiency and suitability of digital signature algorithms based on innovative asymmetric primitives for WSN.We chose XTR-DSA and NTRUSign and implemented both (as well as ECDSA) for MICAz motes.
Related Tags: ASIC
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Performance Analysis of Contemporary Light-Weight Block Ciphers on 8-bit Microcontrollers
Author: S. Rinne, T. Eisenbarth, C. Paar
Description:
This work presents a performance analysis of software implementations of ciphers that are specially designed for the domain of ubiquitous computing. The analysis focuses on the special properties of embedded devices that need to be taken into account like cost (given by memory consumption) and energy requirements. The discussed ciphers include DESL, HIGHT, SEA, and TEA/XTEA. Assembler implementations of the ciphers for an 8-bit AVR microcontroller platform were analyzed and compared with a byte-oriented AES implementation. While all ciphers fail to outperform AES on the discussed 8-bit platform, TEA/XTEA and SEA at least consume significantly less memory than the AES.
Related Tags: VHDL, lightweight, Assembly, ASIC
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Sidechannel Resistant Lightweight ASIC Implementations of DES and AES
Author: A. Poschmann
Description:
In this thesis, we investigate a new lightweight cipher based on DESX. We investigate the design criteria of DES presented in [Cop94] and derive stronger design criteria. We show that S-boxes, which satisfy our new design criteria are more resistant against both differential and linear cryptanalysis. Our new cipher DLX is similar to DES or DESX, respectively, except for the f-function. DES uses eight different S-boxes, whereas our cipher only repeatedly uses one improved S-box (eight times). The implementation results show that our new cipher DLX requires less chip size, less energy, and is more secure against both differential and linear cryptanalysis. We also show that DLX requires 40% less chip size, 85% less clock cycles, and consumes only about 10% of the energy than the best AES implementation with regard to RFIDs needs [FDW04]. In this thesis we also investigate side channel attacks on AES. We present a size- optimised VHDL design of the AES and its results for a standard cell implementation. We show, that this ASIC can easily be broken with a simple power analysis (SPA).
Related Tags: S-box, ASIC, VHDL, lightweight, crypto, embedded
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New Lightweight Crypto Algorithms for RFID
Author: G. Leander, C. Paar, A. Poschmann, K. Schramm
Description:
The authors propose a new block cipher, DESL (DES lightweight extension), which is strong, compact and efficient. Due to its low area constraints DESL is especially suited for RFID (radiofrequency identification) devices. DESL is based on the classical DES (data encryption standard) design, however, unlike DES it uses a single S-box repeated eight times. This approach makes it possible to considerably decrease chip size requirements. The S-box has been highly optimized in such a way that DESL resists common attacks, i.e., linear and differential cryptanalysis, and the Davies-Murphy-attack. Therefore DESL achieves a security level which is appropriate for many applications. Furthermore, we propose a light-weight implementation of DESL which requires 45% less chip size and 86% less clock cycles than the best AES implementations with regard to RFID applications. Compared to the smallest DES implementation published, our DESL design requires 38% less transistors. Our 0.18mum DESL implementation requires a chip size of 7392 transistors (1848 gate equivalences) and is capable to encrypt a 64-bit plaintext in 144 clock cycles. When clocked at 100 kHz, it draws an average current of only 0.89muA. These hardware figures are in the range of the best eSTREAM streamcipher candidates, comprising DESL as a new alternative for ultra low-cost encryption.
Related Tags: S-box, ASIC, VHDL, lightweight, crypto
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Hardware Optimierte Lightweight Block-Chiffren für RFID- und Sensor-Systeme
Author: A. Poschmann, C. Paar
Description:
In diesem Artikel wird ein Überblick über leichtgewichtige Kryptographie (lightweight Cryptography) gegeben. Weiterhin werden die beiden neuen auf Hardware optimierten Chiffren DESL und PRESENT näher vorgestellt. Der anschließende Vergleich der Implementierungsergebnisse mit anderen kürzlich vorgeschlagenen Blockchiffren wie mCrypton, HIGHT oder CLEFIA zeigt, dass DESL und PRESENT weniger Chipfläche verbrauchen. Ebenfalls können beide Algorithmen überraschenderweise sogar mit kürzlich ver¨offentlichten, auf Hardware optimierten Stromchiffren (Trivium und Grain) konkurrieren.
Related Tags: lightweight, VHDL, ASIC
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An Efficient General Purpose Elliptic Curve Cryptography Module for Ubiquitous Sensor Networks
Author: L. Uhsadel, A. Poschmann, and C. Paar
Description:
In this article we present the fastest known implementation of a modular multiplication for a 160-bit standard compliant elliptic curve (secp160r1) for 8-bit micro-controller which are typically used in ubiquitous sensor networks (USN). The major part (77%) of the processing time for an elliptic curve operation such as ECDSA or EC Diffie-Hellman is spent on modular multiplication. We present an optimized arithmetic algorithm which significantly speeds up ECC schemes. The reduced processing time also yields a significantly lower energy consumption of ECC schemes. We show that a 160-bit modular multiplication can be performed in 0.37 ms on an 8-bit AVR processor clocked at 8 MHz. This brings the vision of asymmetric cryptography in the field of USNs with all its benefits for key-distribution and authentication a step closer to reality.
Related Tags: ASIC, VHDL, Assembly, crypto
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Authentication in Ad-hoc and Sensor Networks
Author: A. Weimerskirch
Description:
In the near future microprocessors will be found almost everywhere from cellular phones to washing machines and cars. Once these are connected via a (wireless) communication channel to each other and possibly to already existing static computers this could form an extremely dynamic wireless network which may not have access to an infrastructure or centralized administration. Such a network is often referred to as ad-hoc network. It is particularly useful where a reliable fixed or mobile infrastructure is not available – e.g., after a natural disaster – or too expensive. If the network consists of very small computing devices that are able to sensor their environment, such a network is called a sensor network. As ad-hoc and sensor networks become more a part of everyday life, they could become a threat if security is not considered before deployment. For instance, ad-hoc networks might be used to increase vehicle traffic safety. However, if there are any security vulnerabilities, this technology might be open to attackers and thus endanger passengers. Authentication in ad-hoc networks is a core requirement for secure protocols and secure applications of ad-hoc networks. Thus authentication in ad-hoc networks is the focus of this work. The security issues for ad-hoc networks and sensor networks are different than those for fixed networks. This is due to system constraints in mobile devices, frequent topology changes in the network, and the weak physical security of low-power devices. Moreover in sensor networks, the sensors are exposed to physical attacks such as power analysis and probing. Consequently, protocols need to be designed that are robust against a set of malicious devices as well as compromised secrets. The main goals and achievements of this thesis are as follows: (1) to give an overview of authentication schemes and analyze how well they are suited to ad-hoc networks; (2) to analyze how well digital signature schemes can be used in ad-hoc networks and to compare signature schemes for this purpose; (3) to propose two new extremely efficient authentication schemes for pairwise authentication that mainly use symmetric cryptographic primitives providing a basic form of authentication in sensor networks and certified identification in ad-hoc networks; and (4) an application of authentication providing component identification. Such component identification can be used as a countermeasure to faked components, e.g., for components of automobiles. As a result of this thesis, we recommend the following: First, protocols should be based as much as possible on an approach where trust associations are established to the local one-hop neighborhood only to avoid broadcast authentication schemes; and second, to design protocols that reduce the amount of asymmetric cryptography to a minimum. The protocols proposed in this thesis are a first step to achieve these goals.
Related Tags: Assembly, ASIC, VHDL
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Efficient Embedded Implementation of Security Solutions for ad-hoc Networks
Author: B. Driessen
Description:
For many foreseen applications of "wireless sensor networks" (WSN) message integrity is a crucial requirement. Usually, in the area of WSN security services, such as message integrity, are realized by symmetric cryptography only, because asymmetric cryptography is considered as too demanding for typical WSN devices. However, the proposed solutions for symmetric key establishment introduce a significant computation, storage, and – most important – communication overhead. Digital signatures and key-exchange protocols based on asymmetric algorithms would be very valuable though. In the literature usually only RSA and ECC are implemented and compared for sensor nodes, though there exist a variety of innovative asymmetric algorithms. To close this gap, we investigated the efficiency and suitability of digital signature algorithms based on innovative asymmetric primitives for WSN. We chose XTR-DSA and NTRUSign and implemented both (as well as ECDSA) for MICAz motes. We have decomposed the schemes into layers and show where optimizations can be applied reasonably. Furthermore, we have analyzed, evaluated, and tweaked several algorithms with respect to execution time and memory requirements. We have benchmarked most of the implemented algorithms and give detailed information on precomputation overheads and required RAM and ROM memory. Finally, we have performed a comparative analysis of all three schemes with respect to their suitability for WSNs. We found that, while implemented in pure NesC code, NTRUSign is the winner for being 34% faster in signature generation and 95% faster in signature verification – compared to the de-facto standard ECDSA. To the best of our knowledge, this thesis presents the fastest implementations of signature schemes for WSNs, while using novel modifications of well-known algorithms. Our implementation of ECDSA seems to be the fastest available for MICAz hardware and the ATMega128L micro-processor. Even our implementation of XTR-DSA performs better than comparable ECDSA implementations. We presume that we present the first detailed approach to implementing XTR-DSA and NTRUSign on constrained hardware.
Related Tags: ASIC, Assembly, embedded
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Friday, 24. November 2017 02:39:49 PM - www.lightweightcrypto.org